Integration of TSVs, wafer thinning and backside passivation on full 300mm CMOS wafers for 3D applications

Jourdain, AnneAnneJourdainBuisson, ThibaultThibaultBuissonPhommahaxay, AlainAlainPhommahaxayRedolfi, AugustoAugustoRedolfiThangaraju, SarasvathiSarasvathiThangarajuTravaly, YoussefYoussefTravalyBeyne, EricEricBeyneSwinnen, BartBartSwinnen2021-10-192021-10-192011https://imec-publications.be/handle/20.500.12860/19141Integration of TSVs, wafer thinning and backside passivation on full 300mm CMOS wafers for 3D applicationsProceedings paper