Browsing by author "Martens, Ewout"
Now showing items 1-20 of 43
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A +70dBm IIP3 electrical-balance duplexer for highly-integrated tunable front-ends
van Liempd, Barend; Hershberg, Benjamin; Ariumi, Saneaki; Raczkowski, Kuba; Bink, Karl-Frederik; Karthaus, Udo; Martens, Ewout; Wambacq, Piet; Craninckx, Jan (2016) -
A 0.7-1.15GHz complementary common-gate LNA in 0.18μm SOl CMOS with +15dBm IIP3 and >1kV HBM ESD protection
van Liempd, Barend; Ariumi, Saneaki; Martens, Ewout; Chen, Shih-Hung; Wambacq, Piet; Craninckx, Jan (2015) -
A 0.9V 0.4-6GHz harmonic recombination SDR receiver in 28nm CMOS with HR3/HR5 and IIP2 calibration
van Liempd, Barend; Borremans, Jonathan; Martens, Ewout; Cha, Sungwoo; Suys, Hans; Verbruggen, Bob; Craninckx, Jan (2014) -
A 0.9V low-power 0.4-6GHz linear SDR receiver in 28nm CMOS
Borremans, Jonathan; van Liempd, Barend; Martens, Ewout; Cha, Sungwoo; Craninckx, Jan (2013) -
A 1-GS/s, 12-b, single-channel pipelined ADC with dead-zone-degenerated ring amplifiers
Lagos Benites, Jorge; Hershberg, Benjamin; Martens, Ewout; Wambacq, Piet; Craninckx, Jan (2019-03) -
A 1-MS/s to 1-GS/s Ringamp-Based Pipelined ADC With Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16 nm
Hershberg, Benjamin; Markulic, Nereo; Lagos Benites, Jorge; Martens, Ewout; Dermit, Davide; Craninckx, Jan (2021) -
A 1.67-GSps TI 10-Bit Ping-Pong SAR ADC With 51-dB SNDR in 16-nm FinFET
Dermit, Davide; Shrivas, Mithlesh; Bunsen, Keigo; Lagos Benites, Jorge; Craninckx, Jan; Martens, Ewout (2020) -
A 10.1 ENOB, 6.2fJ/con.-step, 500MS/s ringamp-based pipelined-SAR ADC with background calibration and dynamic reference regulation in 16nm CMOS
Lagos Benites, Jorge; Markulic, Nereo; Hershberg, Benjamin; Dermit, Davide; Shrivas, Mithlesh; Martens, Ewout; Craninckx, Jan (2021) -
A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS
Lagos Benites, Jorge; Markulic, Nereo; Hershberg, Benjamin; Dermit, Davide; Shrivas, Mithlesh; Martens, Ewout; Craninckx, Jan (2022) -
A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration
Wei, Lai; Zheng, Zihao; Markulic, Nereo; Lagos, Jorge; Martens, Ewout; Martins, Rui Paulo; Zhu, Yan; Craninckx, Jan; Chan, Chi-Hang (2023) -
A 150 kHz-80 MHz BW DT analog baseband for SDR RX using a 5th-order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOS
Malki, Badr; Verbruggen, Bob; Martens, Ewout; Wambacq, Piet; Craninckx, Jan (2015) -
A 150kHz-80MHz BW discrete-time analog baseband for aoftware-defined-radio receivers using a 5th-order IIR LPF, active FIR and a 10 bit 300 MS/s ADC in 28nm CMOS
Malki, Badr; Verbruggen, Bob; Martens, Ewout; Wambacq, Piet; Craninckx, Jan (2016) -
A 16nm 69dB SNDR 300MSps ADC with capacitive reference stabilization
Martens, Ewout; Hershberg, Benjamin; Craninckx, Jan (2017) -
A 1Gsps, 12-bit, single-channel pipelined ADC with dead-zone-degenerated ring amplifiers
Lagos Benites, Jorge; Hershberg, Benjamin; Martens, Ewout; Wambacq, Piet; Craninckx, Jan (2018-04) -
A 1MS/s to 1GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nm
Hershberg, Benjamin; Markulic, Nereo; Craninckx, Jan; Lagos Benites, Jorge; Martens, Ewout; Dermit, Davide (2020) -
A 3.2GS/s 10 ENOB 61mW ringamp ADC in 16nm with background monitoring of distortion
Hershberg, Benjamin; Martens, Ewout; van Liempd, Barend; Craninckx, Jan; Markulic, Nereo; Lagos Benites, Jorge; Dermit, Davide (2019) -
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier
Zheng, Zihao; Wei, Lai; Zhu, Yan; Chan, Chi-Hang; Martins, Rui P.; Lagos Benites, Jorge; Martens, Ewout; Craninckx, Jan (2022) -
A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion
Hershberg, Benjamin; Dermit, Davide; van Liempd, Barend; Martens, Ewout; Markulic, Nereo; Lagos Benites, Jorge; Craninckx, Jan (2021) -
A 47.5MHz BW 4.7mW 67dB SNDR Ringamp Based Discrete-Time Delta Sigma ADC
Moura Santana, Lucas; Martens, Ewout; Lagos Benites, Jorge; Hershberg, Benjamin; Wambacq, Piet; Craninckx, Jan (2021) -
A 48-dB DR 80-MHz BW 8.88-GS/s bandpass delta-sigma ADC for RF digitization with integrated PLL and polyphase decimation filter in 40nm CMOS
Martens, Ewout; Bourdoux, André; Couvreur, Aissa; Van Wesemael, Peter; Van der Plas, Geert; Craninckx, Jan; Ryckaert, Julien (2011)