Now showing items 1-2 of 2

    • Test circuits for fast and reliable assessment if CDM robustness of I/O stages 

      Stadler, W.; Esmark, K.; Reynders, K.; Zubeidat, M.; Graf, M.; Wilkening, W.; Willemen, J.; Qu, D.; Mettler, S.; Etherton, M.; Nuernbergk, D.; Wolf, H.; Gieser, H.; Soppa, W.; De Heyn, Vincent; Mahadeva Iyer, Natarajan; Groeseneken, Guido; Morena, E.; Stella, I.; Andreini, A.; Litzenberger, M.; Pogany, D.; Gornik, E.; Foss, C.; Konrad, A.; Frank, M. (2005)
    • Test circuits for fast and reliable assessment of CDM robustness of I/O stages 

      Stadler, Wolfgang; Esmark, K.; Reynders, K.; Zuhbeidat, M.; Graf, M.; Wilkening, W.; Willemen, J.; Qu, S.; Settler, S.; Etherton, M.; Nuernbergk, D.; Wolf, H.; Gieser, H.; Soppa, W.; De Heyn, Vincent; Mahadeva Iyer, Natarajan; Groeseneken, Guido; Morena, E.; Stella, R.; Andreini, A.; Litzenberger, M.; Pogany, D.; Gornik, E.; Foss, C.; Konrad, A.; Frank, M. (2003)