Now showing items 1-2 of 2

    • Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performances 

      Mercha, Abdelkarim; Van der Plas, Geert; Moroz, V.; De Wolf, Ingrid; Asimakopoulos, Panagiotis; Minas, Nikolaos; Domae, Shinichi; Perry, Dan; Choi, M.; Redolfi, Augusto; Okoro, Chukwudi; Yang, Yu; Van Olmen, Jan; Thangaraju, Sarasvathi; Sabuncuoglu Tezcan, Deniz; Soussan, Philippe; Cho, Jong Hoon; Yakovlev, A.; Marchal, Pol; Travaly, Youssef; Beyne, Eric; Biesemans, Serge; Swinnen, Bart (2010)
    • Impact of thinning and through silicon via proximity on high-k / metal gate first CMOS performance 

      Mercha, Abdelkarim; Redolfi, Augusto; Stucchi, Michele; Minas, Nikolaos; Van Olmen, Jan; Thangaraju, Sarasvathi; Velenis, Dimitrios; Domae, Shinichi; Yang, Yu; Katti, Guruprasad; Labie, Riet; Okoro, Chukwudi; Zhao, Ming; Asimakopoulos, Panagiotis; De Wolf, Ingrid; Chiarella, Thomas; Schram, Tom; Rohr, Erika; Van Ammel, Annemie; Jourdain, Anne; Ruythooren, Wouter; Armini, Silvia; Radisic, Alex; Philipsen, Harold; Heylen, Nancy; Kostermans, Maarten; Jaenen, Patrick; Sleeckx, Erik; Sabuncuoglu Tezcan, Deniz; Debusschere, Ingrid; Soussan, Philippe; Perry, Dan; Van der Plas, Geert; Cho, Jong Hoon; Marchal, Pol; Travaly, Youssef; Beyne, Eric; Biesemans, Serge; Swinnen, Bart (2010)