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dc.contributor.authorCassimon, Thomas
dc.contributor.authorVanneste, Simon
dc.contributor.authorBosmans, Stig
dc.contributor.authorMercelis, Siegfried
dc.contributor.authorHellinckx, Peter
dc.date.accessioned2021-11-02T15:56:52Z
dc.date.available2021-11-02T15:56:52Z
dc.date.issued2020-DEC
dc.identifier.issn2543-1536
dc.identifier.otherWOS:000695695600001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/37552
dc.sourceWOS
dc.titleDesigning resource-constrained neural networks using neural architecture search targeting embedded devices
dc.typeJournal article
dc.contributor.imecauthorCassimon, Thomas
dc.contributor.imecauthorVanneste, Simon
dc.contributor.imecauthorBosmans, Stig
dc.contributor.imecauthorMercelis, Siegfried
dc.contributor.imecauthorHellinckx, Peter
dc.contributor.orcidimecCassimon, Thomas::0000-0002-7471-2508
dc.contributor.orcidimecVanneste, Simon::0000-0002-9664-9925
dc.contributor.orcidimecMercelis, Siegfried::0000-0001-9355-6566
dc.identifier.doi10.1016/j.iot.2020.100234
dc.source.numberofpages14
dc.source.peerreviewyes
dc.source.journalINTERNET OF THINGS
dc.source.volume12
imec.availabilityUnder review


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