dc.contributor.author | Balamurali, Sriram | |
dc.contributor.author | Mangraviti, Giovanni | |
dc.contributor.author | Tsai, Cheng-Hsueh | |
dc.contributor.author | Wambacq, Piet | |
dc.contributor.author | Craninckx, Jan | |
dc.date.accessioned | 2023-08-21T09:26:57Z | |
dc.date.available | 2023-06-20T10:34:28Z | |
dc.date.available | 2023-08-21T09:26:57Z | |
dc.date.issued | 2022 | |
dc.identifier.issn | 0018-9200 | |
dc.identifier.other | WOS:000788907100001 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/41850.3 | |
dc.source | WOS | |
dc.title | Design and Analysis of 55-63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS | |
dc.type | Journal article | |
dc.contributor.imecauthor | Balamurali, Sriram | |
dc.contributor.imecauthor | Mangraviti, Giovanni | |
dc.contributor.imecauthor | Wambacq, Piet | |
dc.contributor.imecauthor | Craninckx, Jan | |
dc.contributor.orcidext | Tsai, Cheng-Hsueh::0000-0002-3168-0892 | |
dc.contributor.orcidimec | Mangraviti, Giovanni::0000-0001-5134-7205 | |
dc.contributor.orcidimec | Wambacq, Piet::0000-0003-4388-7257 | |
dc.contributor.orcidimec | Balamurali, Sriram::0000-0002-8361-9559 | |
dc.contributor.orcidimec | Craninckx, Jan::0000-0002-3980-0203 | |
dc.identifier.doi | 10.1109/JSSC.2022.3165654 | |
dc.source.numberofpages | 14 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 1997 | |
dc.source.endpage | 2010 | |
dc.source.journal | IEEE JOURNAL OF SOLID-STATE CIRCUITS | |
dc.source.issue | 7 | |
dc.source.volume | 57 | |
imec.availability | Published - imec | |
dc.description.wosFundingText | This work was supported in part by the Strategic Research Program of the Vrije Universiteit Brussels under Grant SRP-19. | |