Browsing by author "Mallik, Arindam"
Now showing items 1-20 of 62
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A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm2 in -Memory Analog Matrix -Vector-Multiplier for DNN Acceleration
Papistas, Ioannis; Cosemans, Stefan; Rooseleer, Bram; Doevenspeck, Jonas; Na, Myung Hee; Mallik, Arindam; Debacker, Peter; Verkest, Diederik (2021) -
A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms
Iosifidis, Yannis; Mallik, Arindam; Mamagkakis, Stylianos; De Greef, Eddy; Bartzas, Alexis; Soudris, Dimitrios; Catthoor, Francky (2010) -
AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators
Yang, Simei; Bhattacharjee, Debjyoti; Baapanapalli Yadaiah, Vinay Kumar; Chatterjee, Saikat; De, Sayandip; Debacker, Peter; Verkest, Diederik; Mallik, Arindam; Catthoor, Francky (2022-06-13) -
AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference
Dadras, Iman; Sarda, Giuseppe; Laubeuf, Nathan; Bhattacharjee, Debjyoti; Mallik, Arindam (2023) -
An introduction to system level exploration of innovative process technology
Mallik, Arindam (2010) -
Automatic extraction of pipeline parallelism for embedded software using linear programming
Cordes, Daniel; Mallik, Arindam; Heinig, Andreas; Marwedel, Peter (2011) -
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
Cordes, Daniel; Marwedel, Peter; Mallik, Arindam (2010) -
Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing
Caselli, Michele; Papistas, Ioannis; Cosemans, Stefan; Mallik, Arindam; Debacker, Peter; Verkest, Diederik (2021) -
Circuit and product level assessment of emerging fully depleted channel devices: FinFET and UTBOX-SOI
Badaroglu, Mustafa; Dehan, Morin; Garcia Bardon, Marie; Miranda Corbalan, Miguel; Zuber, Paul; Schuddinck, Pieter; Mallik, Arindam; Mercha, Abdelkarim; Verkest, Diederik (2012) -
Cost effective FinFET platform for stand alone DRAM 1Y and beyond memory periphery
Spessot, Alessio; Sharan, Neha; Oh, Hyungrock; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Mallik, Arindam; De Keersgieter, An; Parvais, Bertrand; Sherazi, Yasser; Machkaoutsan, Vladimir; Kim, Cheolgyu; Fazan, Pierre; Mocuta, Dan; Mocuta, Anda; Horiguchi, Naoto (2018-01) -
Design technology co-optimization for N10
Ryckaert, Julien; Raghavan, Praveen; Baert, Rogier; Garcia Bardon, Marie; Dusa, Mircea; Mallik, Arindam; Sakhare, Sushil; Vandewalle, Boris; Wambacq, Piet; Chava, Bharani; Croes, Kris; Dehan, Morin; Jang, Doyoung; Leray, Philippe; Liu, Tsung-Te; Miyaguchi, Kenichi; Parvais, Bertrand; Schuddinck, Pieter; Weemaes, Philippe; Mercha, Abdelkarim; Boemmels, Juergen; Horiguchi, Naoto; McIntyre, Greg; Thean, Aaron; Tokei, Zsolt; Cheng, Shaunee; Verkest, Diederik; Steegen, An (2014) -
Design-technology co-optimization for OxRRAM-based synaptic processing unit
Mallik, Arindam; Garbin, Daniele; Fantini, Andrea; Rodopoulos, Dimitrios; Degraeve, Robin; Stuijt, Jan; Das, Anup Kumar; Schaafsma, Siebren; Debacker, Peter; Donadio, Gabriele Luca; Hody, Hubert; Goux, Ludovic; Kar, Gouri Sankar; Furnemont, Arnaud; Mocuta, Anda; Raghavan, Praveen (2017) -
Design-Technology Space Exploration For Energy Efficient AiMC-based Inference Acceleration
Bhattacharjee, Debjyoti; Laubeuf, Nathan; Cosemans, Stefan; Papistas, Ioannis; Mallik, Arindam; Debacker, Peter; Na, Myung Hee; Verkest, Diederik (2021) -
DTCO and TCAD for a 12 layer-EUV ultra-scaled surrounding gate transistor 6T-SRAM
Matagne, Philippe; Nakamura, H.; Kim, Min-Soo; Kikuchi, Yoshiaki; Huynh Bao, Trong; Tao, Zheng; Li, Waikin; Devriendt, Katia; Ragnarsson, Lars-Ake; Boemmels, Juergen; Mallik, Arindam; Altamirano Sanchez, Efrain; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Porret, Clément; Mocuta, Dan; Harada, N.; Matsuoka, F. (2018) -
DTCO including Sustainability: Power-Performance-Area-Cost-Environmental score (PPACE) Analysis for Logic Technologies
Garcia Bardon, Marie; Wuytens, Pieter; Ragnarsson, Lars-Ake; Mirabelli, Gioele; Jang, Doyoung; Willems, Geert; Mallik, Arindam; Spessot, Alessio; Ryckaert, Julien; Parvais, Bertrand (2020) -
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration
Laubeuf, Nathan; Doevenspeck, Jonas; Papistas, Ioannis; Caselli, Michele; Cosemans, Stefan; Vrancx, Peter; Bhattacharjee, Debjyoti; Mallik, Arindam; Debacker, Peter; Verkest, Diederik; Catthoor, Francky; Lauwereins, Rudy (2022-09) -
Economics of semiconductor scaling – a cost analysis for advanced technology node
Mallik, Arindam; Ryckaert, Julien; Kim, Ryan Ryoung han; Debacker, Peter; Decoster, Stefan; Lazzarino, Frederic; Ritzenthaler, Romain; Horiguchi, Naoto; Verkest, Diederik; Mocuta, Anda (2019) -
Electrical comparison of iN7 EUV hybrid and EUV single patterning BEOL metal layers
Lariviere, Stephane; Wilson, Chris; Kutrzeba Kotowska, Bogumila; Versluijs, Janko; Decoster, Stefan; Mao, Ming; van der Veen, Marleen; Jourdan, Nicolas; El-Mekki, Zaid; Heylen, Nancy; Kesters, Els; Verdonck, Patrick; Beral, Christophe; Van Den Heuvel, Dieter; De Bisschop, Peter; Bekaert, Joost; Blanco, Victor; Ciofi, Ivan; Wan, Danny; Briggs, Basoene; Mallik, Arindam; Hendrickx, Eric; Kim, Ryan Ryoung han; McIntyre, Greg; Ronse, Kurt; Boemmels, Juergen; Tokei, Zsolt; Mocuta, Dan (2018) -
EUVL Gen 2.0: Key requirements for constraining semiconductor cost in advanced technology node manufacturing
Mallik, Arindam; Debacker, Peter; McIntyre, Greg; Kim, Ryan Ryoung han; Ronse, Kurt (2018) -
EUVL introduction impact on development cycle for advanced technology
Mallik, Arindam; Ryckaert, Julien; Ronse, Kurt; Verkest, Diederik; Thean, Aaron (2016)