Browsing by author "Huang, Yanxiang"
Now showing items 1-13 of 13
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<30 MW rectangular-to-polar conversion processor in 802.11AD polar transmitter
Li, Chunshu; Bourdoux, André; Verhelst, Marian; Huang, Yanxiang; Li, Min; Van der Perre, Liesbet; Pollin, Sofie (2015) -
A 100 Gbps LDPC decoder for the IEEE 802.11ay standard
Li, Meng; Derudder, Veerle; Desset, Claude; Dewilde, Andy; Bourdoux, André; Huang, Yanxiang (2018) -
A 28 nm CMOS 7.04 Gsps polar digital front-end processor for 60 GHz transmitter
Huang, Yanxiang; Khalaf, Khaled; Bourdoux, André; Verschueren, Julien; Shi, Qixian; Wambacq, Piet; Pollin, Sofie; Dehaene, Wim; Van der Perre, Liesbet (2016) -
An algorithm to identify cornerstones of digital circuits
Huang, Yanxiang; Li, Chunshu; Li, Meng; Catthoor, Francky; Van der Perre, Liesbet; Dehaene, Wim (2016) -
An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS
Li, Meng; Weijers, Jan-Willem; Derudder, Veerle; Vos, Ilse; Rykunov, Maxim; Dupont, Steven; Debacker, Peter; Dewilde, Andy; Huang, Yanxiang; Van der Perre, Liesbet; Van Thillo, Wim (2015) -
Area and energy efficient 802.11ad LDPC decoding processor
Li, Meng; Lee, Youngjoo; Huang, Yanxiang; Van der Perre, Liesbet (2015) -
Computation-skip error mitigation scheme for power supply voltage scaling in recursive applications
Huang, Yanxiang; Li, Meng; Li, Chunshu; Debacker, Peter; Van der Perre, Liesbet (2016) -
Computation-skip error resilient scheme for recursive CORDIC
Huang, Yanxiang; Li, Meng; Li, Chunshu; Debacker, Peter; Van der Perre, Liesbet (2014) -
Cross-Layer Optimization for Power-Efficient and Robust Digital Circuits and Systems
Huang, Yanxiang (2017-09) -
Energy-efficient digital front-end processor for 60 GHz polar transmitter
Li, Chunshu; Huang, Yanxiang; Khalaf, Khaled; Bourdoux, André; Verhelst, Marian; Van der Perre, Liesbet; Pollin, Sofie (2018) -
Fine-grained hardware switching scheme for power reduction in multiplication
Huang, Yanxiang; Li, Chunshu; Li, Meng; Van der Perre, Liesbet; Dehaene, Wim (2016-08) -
Gbps throughput architecture for turbo decoder
Callejon Montoza, Antonio Manuel; Li, Meng; Huang, Yanxiang; Pollin, Sofie; Van der Perre, Liesbet (2014) -
Massive MIMO processing at the semiconductor edge: exploiting the system and circuit margins for power savings
Huang, Yanxiang; Desset, Claude; Bourdoux, André; Dehaene, Wim; Van der Perre, Liesbet (2017)