Now showing items 1-2 of 2

    • Design technology co-optimization for a robust 10nm solution for logic design and Sram 

      Vandewalle, Boris; Chava, Bharani; Sakhare, Sushil; Ryckaert, Julien; Dusa, Mircea (2014)
    • Design technology co-optimization for N10 

      Ryckaert, Julien; Raghavan, Praveen; Baert, Rogier; Garcia Bardon, Marie; Dusa, Mircea; Mallik, Arindam; Sakhare, Sushil; Vandewalle, Boris; Wambacq, Piet; Chava, Bharani; Croes, Kris; Dehan, Morin; Jang, Doyoung; Leray, Philippe; Liu, Tsung-Te; Miyaguchi, Kenichi; Parvais, Bertrand; Schuddinck, Pieter; Weemaes, Philippe; Mercha, Abdelkarim; Boemmels, Juergen; Horiguchi, Naoto; McIntyre, Greg; Thean, Aaron; Tokei, Zsolt; Cheng, Shaunee; Verkest, Diederik; Steegen, An (2014)