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Digital ground bounce reduction by supply current shaping and clock frequency modulation

dc.contributor.authorBadaroglu, Mustafa
dc.contributor.authorWambacq, Piet
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorDonnay, Stephane
dc.contributor.authorGielen, Georges
dc.contributor.authorDe Man, Hugo
dc.date.accessioned2021-10-16T00:43:27Z
dc.date.available2021-10-16T00:43:27Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/10044
dc.sourceIIOimport
dc.titleDigital ground bounce reduction by supply current shaping and clock frequency modulation
dc.typeJournal article
dc.contributor.imecauthorBadaroglu, Mustafa
dc.contributor.imecauthorWambacq, Piet
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorDonnay, Stephane
dc.contributor.imecauthorGielen, Georges
dc.contributor.imecauthorDe Man, Hugo
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecDonnay, Stephane::0000-0003-2489-4793
dc.source.peerreviewno
dc.source.beginpage65
dc.source.endpage76
dc.source.journalIEEE Trans. Computer-Aided Design of Integrated Circuits and Systems
dc.source.issue1
dc.source.volume24
imec.availabilityPublished - imec


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