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Analysis of temperature-induced saturation threshold voltage degradation in deep-submicron ultrathin SOI MOSFETs

dc.contributor.authorPavanello, M.A.
dc.contributor.authorMartino, J.A.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorClaeys, Cor
dc.date.accessioned2021-10-16T04:01:09Z
dc.date.available2021-10-16T04:01:09Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11006
dc.sourceIIOimport
dc.titleAnalysis of temperature-induced saturation threshold voltage degradation in deep-submicron ultrathin SOI MOSFETs
dc.typeJournal article
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.source.peerreviewno
dc.source.beginpage2236
dc.source.endpage2242
dc.source.journalIEEE Trans. Electron Devices
dc.source.issue10
dc.source.volume52
imec.availabilityPublished - imec


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