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Tunneling 1/fg noise in 5nm HfO2/2.1 nm SiO2 gate stack n-MOSFETs

dc.contributor.authorSimoen, Eddy
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorPantisano, Luigi
dc.contributor.authorClaeys, Cor
dc.contributor.authorYoung, Edward
dc.date.accessioned2021-10-16T05:07:02Z
dc.date.available2021-10-16T05:07:02Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11214
dc.sourceIIOimport
dc.titleTunneling 1/fg noise in 5nm HfO2/2.1 nm SiO2 gate stack n-MOSFETs
dc.typeJournal article
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.source.peerreviewno
dc.source.beginpage702
dc.source.endpage707
dc.source.journalSolid-State Electronics
dc.source.issue5
dc.source.volume49
imec.availabilityPublished - imec


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