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ESD circuit model based protection network optimisation for extended-voltage NMOS drivers

dc.contributor.authorVassilev, Vesselin
dc.contributor.authorVaschenko, V.
dc.contributor.authorJansen, Philippe
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorTerbeek, M.
dc.date.accessioned2021-10-16T06:41:57Z
dc.date.available2021-10-16T06:41:57Z
dc.date.issued2005-10
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11487
dc.sourceIIOimport
dc.titleESD circuit model based protection network optimisation for extended-voltage NMOS drivers
dc.typeJournal article
dc.contributor.imecauthorGroeseneken, Guido
dc.source.peerreviewno
dc.source.beginpage1430
dc.source.endpage1435
dc.source.journalMicrelectronics Reliability
dc.source.issue9_11
dc.source.volume45
imec.availabilityPublished - imec
imec.internalnotespaper presented at the European Symposium on Reliability of Electron Devices, Failure physcics and analysis, Arcachon, France, 10-14 Ocotber 2005


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