Synthesis of reversible logic
| dc.contributor.author | De Vos, Alexis | |
| dc.contributor.author | Van Rentergem, Y. | |
| dc.date.accessioned | 2021-10-16T15:37:21Z | |
| dc.date.available | 2021-10-16T15:37:21Z | |
| dc.date.issued | 2007 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/11994 | |
| dc.source | IIOimport | |
| dc.title | Synthesis of reversible logic | |
| dc.type | Journal article | |
| dc.date.embargo | 9999-12-31 | |
| dc.source.peerreview | no | |
| dc.source.beginpage | 325 | |
| dc.source.endpage | 341 | |
| dc.source.journal | International Journal of Circuit Theory and Applications | |
| dc.source.volume | 35 | |
| imec.availability | Published - open access |