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Finding and applying loop transformations for generating optimized FPGA implementations

dc.contributor.authorDevos, H.
dc.contributor.authorBeyls, K.
dc.contributor.authorChristiaens, M.
dc.contributor.authorVan Campenhout, Jan
dc.contributor.authorD'Hollander, E.H.
dc.contributor.authorStroobandt, Dirk
dc.date.accessioned2021-10-16T15:49:49Z
dc.date.available2021-10-16T15:49:49Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12066
dc.sourceIIOimport
dc.titleFinding and applying loop transformations for generating optimized FPGA implementations
dc.typeBook chapter
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage159
dc.source.bookTransactions on High-Performance Embedded Architectures and Compilers I
dc.source.endpage178
imec.availabilityPublished - open access
imec.internalnotesLecture Notes in Computer Science; Vol. 4050


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