Technology-aware design of SRAM memory circuits
| dc.contributor.author | Grossar, Evelyn | |
| dc.date.accessioned | 2021-10-16T16:25:12Z | |
| dc.date.available | 2021-10-16T16:25:12Z | |
| dc.date.issued | 2007-03 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/12234 | |
| dc.source | IIOimport | |
| dc.title | Technology-aware design of SRAM memory circuits | |
| dc.type | PHD thesis | |
| dc.date.embargo | 9999-12-31 | |
| dc.source.peerreview | no | |
| dc.contributor.thesisadvisor | Dehaene, Wim | |
| dc.contributor.thesisadvisor | Maex, Karen | |
| imec.availability | Published - open access |