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Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors

dc.contributor.authorKobayashi, Yuki
dc.contributor.authorJayapala, Murali
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorCatthoor, Francky
dc.contributor.authorImai, Masaharu
dc.date.accessioned2021-10-16T17:10:31Z
dc.date.available2021-10-16T17:10:31Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12413
dc.sourceIIOimport
dc.titleMethodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors
dc.typeJournal article
dc.contributor.imecauthorJayapala, Murali
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecJayapala, Murali::0000-0001-7917-0149
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.journalACM Transactions on Design Automation of Electronic Systems (TODAES)
dc.source.issue4
dc.source.volume12
imec.availabilityPublished - open access
imec.internalnotesArticle no. 41


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