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Double-gate FinFETs as a CMOS technology downscaling option: an RF perspective

dc.contributor.authorNuttinck, Sebastien
dc.contributor.authorParvais, Bertrand
dc.contributor.authorCuratola, Gilberto
dc.contributor.authorMercha, Abdelkarim
dc.date.accessioned2021-10-16T18:13:25Z
dc.date.available2021-10-16T18:13:25Z
dc.date.issued2007-02
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12628
dc.sourceIIOimport
dc.titleDouble-gate FinFETs as a CMOS technology downscaling option: an RF perspective
dc.typeJournal article
dc.contributor.imecauthorParvais, Bertrand
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.orcidimecParvais, Bertrand::0000-0003-0769-7069
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.source.peerreviewno
dc.source.beginpage279
dc.source.endpage283
dc.source.journalIEEE Trans. ELectron Devices
dc.source.issue2
dc.source.volume54
imec.availabilityPublished - imec


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