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A 52 GHz phased-array receiver front-end in 90 nm digital CMOS

dc.contributor.authorScheir, Karen
dc.contributor.authorBronckers, Stephane
dc.contributor.authorBorremans, Jonathan
dc.contributor.authorWambacq, Piet
dc.contributor.authorRolain, Yves
dc.date.accessioned2021-10-17T10:31:28Z
dc.date.available2021-10-17T10:31:28Z
dc.date.issued2008
dc.identifier.issn0018-9200
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/14433
dc.sourceIIOimport
dc.titleA 52 GHz phased-array receiver front-end in 90 nm digital CMOS
dc.typeJournal article
dc.contributor.imecauthorWambacq, Piet
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage2651
dc.source.endpage2659
dc.source.journalIEEE Journal of Solid-State Circuits
dc.source.issue12
dc.source.volume43
imec.availabilityPublished - open access


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