Bias temperature instability effects in devices with fully-silicided gate stacks, strained-Si and multiple-gate architectures

dc.contributor.author	Shickova, Adelina
dc.date.accessioned	2021-10-17T10:42:33Z
dc.date.available	2021-10-17T10:42:33Z
dc.date.issued	2008-12
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/14464
dc.source	IIOimport
dc.title	Bias temperature instability effects in devices with fully-silicided gate stacks, strained-Si and multiple-gate architectures
dc.type	PHD thesis
dc.date.embargo	9999-12-31
dc.source.peerreview	no
dc.contributor.thesisadvisor	Groeseneken, Guido
dc.contributor.thesisadvisor	Maes, Herman
imec.availability	Published - open access