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Ultimate scaling of CMOS logic devices with Ge and III-V materials

dc.contributor.authorHeyns, Marc
dc.contributor.authorTsai, Wilman
dc.date.accessioned2021-10-17T22:54:39Z
dc.date.available2021-10-17T22:54:39Z
dc.date.issued2009
dc.identifier.issn0883-7694
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15477
dc.sourceIIOimport
dc.titleUltimate scaling of CMOS logic devices with Ge and III-V materials
dc.typeJournal article
dc.contributor.imecauthorHeyns, Marc
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage485
dc.source.endpage492
dc.source.journalMRS Bulletin
dc.source.issue7
dc.source.volume34
imec.availabilityPublished - open access


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