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Architectural exploration and design of time-interleaved SAR arrays for low-power and high speed A/D converters

dc.contributor.authorSaponara, Sergio
dc.contributor.authorNuzzo, Pierluigi
dc.contributor.authorNanni, Claudio
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorFanucci, Luca
dc.date.accessioned2021-10-18T02:37:35Z
dc.date.available2021-10-18T02:37:35Z
dc.date.issued2009
dc.identifier.issn0916-8524
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/16160
dc.sourceIIOimport
dc.titleArchitectural exploration and design of time-interleaved SAR arrays for low-power and high speed A/D converters
dc.typeJournal article
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.source.peerreviewyes
dc.source.beginpage843
dc.source.endpage851
dc.source.journalIEICE Transactions on Electronics
dc.source.issue6
dc.source.volumeE92-C
imec.availabilityPublished - imec


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