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Sytematic architecture exploration method for low power and high performance reconfigurable processors

dc.contributor.authorTaniguchi, Ittetsu
dc.date.accessioned2021-10-18T03:29:49Z
dc.date.available2021-10-18T03:29:49Z
dc.date.issued2009-01
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/16289
dc.sourceIIOimport
dc.titleSytematic architecture exploration method for low power and high performance reconfigurable processors
dc.typePHD thesis
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.contributor.thesisadvisorImai, Masaharu
dc.contributor.thesisadvisorCatthoor, Francky
imec.availabilityPublished - open access


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