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Testing of 3D chips: anything new under the sun?

dc.contributor.authorMarinissen, Erik Jan
dc.date.accessioned2021-10-18T18:49:13Z
dc.date.available2021-10-18T18:49:13Z
dc.date.issued2010-03
dc.identifier.issn0740-7475
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17580
dc.sourceIIOimport
dc.titleTesting of 3D chips: anything new under the sun?
dc.typeJournal article
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage75
dc.source.journalIEEE Design & Test of Computers
dc.source.issue2
dc.source.volume27
dc.identifier.urlhttp://www.computer.org/portal/web/dt/pansum-marapr10
imec.availabilityPublished - open access
imec.internalnotesITC 2009 Panel summary


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