2PARMA: Parallel paradigms and run-time management techniques for many-core architectures
dc.contributor.author | Silvano, C. | |
dc.contributor.author | Fornaciari, W. | |
dc.contributor.author | Reghizzi, S. | |
dc.contributor.author | Agosta, G. | |
dc.contributor.author | Palermo, G. | |
dc.contributor.author | Zaccaria, V. | |
dc.contributor.author | Bellasi, P. | |
dc.contributor.author | Castro, F. | |
dc.contributor.author | Corbetta, S. | |
dc.contributor.author | Di Biagio, A. | |
dc.contributor.author | Speziale, E. | |
dc.contributor.author | Tartara, M. | |
dc.contributor.author | Siorpaes, D. | |
dc.contributor.author | Hubert, H. | |
dc.contributor.author | Stabernack, B. | |
dc.contributor.author | Brandenburg, J. | |
dc.contributor.author | Palkovic, Martin | |
dc.contributor.author | Raghavan, Praveen | |
dc.contributor.author | Couvreur, Chantal | |
dc.contributor.author | Bartzas, A. | |
dc.contributor.author | Xydis, S. | |
dc.contributor.author | Soudris, D. | |
dc.contributor.author | Kempf, T. | |
dc.contributor.author | Asheid, G. | |
dc.contributor.author | Leupers, R. | |
dc.contributor.author | Meyr, H. | |
dc.contributor.author | Ansari, J. | |
dc.contributor.author | Mahonen, P. | |
dc.contributor.author | Vanthournout, B. | |
dc.date.accessioned | 2021-10-19T18:48:48Z | |
dc.date.available | 2021-10-19T18:48:48Z | |
dc.date.issued | 2011 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/19779 | |
dc.source | IIOimport | |
dc.title | 2PARMA: Parallel paradigms and run-time management techniques for many-core architectures | |
dc.type | Book chapter | |
dc.source.peerreview | no | |
dc.source.beginpage | 65 | |
dc.source.book | VLSI 2010 Annual Symposium. Selected papers | |
dc.source.endpage | 79 | |
imec.availability | Published - imec | |
imec.internalnotes | Lecture Notes in Electrical Engineering; Vol. 105 |
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