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dc.contributor.authorArreghini, Antonio
dc.contributor.authorKar, Gouri Sankar
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-21T06:42:54Z
dc.date.available2021-10-21T06:42:54Z
dc.date.issued2013
dc.identifier.issn0741-3106
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/21984
dc.sourceIIOimport
dc.titleImpact of charge trapping layer thickness and new trade-off in performance characteristics of 3-D SONOS devices
dc.typeJournal article
dc.contributor.imecauthorArreghini, Antonio
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecArreghini, Antonio::0000-0002-7493-9681
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.source.peerreviewyes
dc.source.beginpage632
dc.source.endpage634
dc.source.journalIEEE Electron Device Letters
dc.source.issue5
dc.source.volume34
dc.identifier.urlhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6504469
imec.availabilityPublished - imec


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