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Design flow for silicon chip implementing novel platform architecture for wireless communication

dc.contributor.authorAvasare, Prabhat
dc.contributor.authorDeclerck, Jeroen
dc.contributor.authorGlassee, Miguel
dc.contributor.authorAmin, Amir
dc.contributor.authorUmans, Erik
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorPalkovic, Martin
dc.date.accessioned2021-10-21T06:43:30Z
dc.date.available2021-10-21T06:43:30Z
dc.date.issued2013
dc.identifier.issn1947-3176
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/21998
dc.sourceIIOimport
dc.titleDesign flow for silicon chip implementing novel platform architecture for wireless communication
dc.typeJournal article
dc.contributor.imecauthorGlassee, Miguel
dc.source.peerreviewyes
dc.source.beginpage42
dc.source.endpage63
dc.source.journalInternational Journal of Embedded and Real-Time Communication Systems (IJERTCS)
dc.source.issue1
dc.source.volume4
imec.availabilityPublished - imec


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