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Near-optimal microprocessor and accelerators co-design with latency and throughput constraints

dc.contributor.authorKritikakou, Angeliki
dc.contributor.authorCatthoor, Francky
dc.contributor.authorAthanasiou, Giorgios
dc.contributor.authorKelefouras, V.
dc.contributor.authorGoutis, Costas
dc.date.accessioned2021-10-21T08:57:16Z
dc.date.available2021-10-21T08:57:16Z
dc.date.issued2013-04
dc.identifier.issn1544-3566
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22617
dc.sourceIIOimport
dc.titleNear-optimal microprocessor and accelerators co-design with latency and throughput constraints
dc.typeJournal article
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewyes
dc.source.beginpage6.1
dc.source.endpage6.25
dc.source.journalACM Transactions on Architecture and Code Optimization
dc.source.issue2
dc.source.volume10
imec.availabilityPublished - imec


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