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Wafer scale copper direct plating on thin PVD RuTa layers: A route to enable filling 30 nm features and below?

dc.contributor.authorArmini, Silvia
dc.contributor.authorEl-Mekki, Zaid
dc.contributor.authorNagar, Margalit
dc.contributor.authorRadisic, Alex
dc.contributor.authorVereecken, Philippe
dc.date.accessioned2021-10-22T00:44:01Z
dc.date.available2021-10-22T00:44:01Z
dc.date.issued2014
dc.identifier.issn0013-4651
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23502
dc.sourceIIOimport
dc.titleWafer scale copper direct plating on thin PVD RuTa layers: A route to enable filling 30 nm features and below?
dc.typeJournal article
dc.contributor.imecauthorArmini, Silvia
dc.contributor.imecauthorEl-Mekki, Zaid
dc.contributor.imecauthorRadisic, Alex
dc.contributor.imecauthorVereecken, Philippe
dc.contributor.orcidimecArmini, Silvia::0000-0003-0578-3422
dc.contributor.orcidimecVereecken, Philippe::0000-0003-4115-0075
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpageD564
dc.source.endpageD570
dc.source.journalJournal of the Electrochemical Society
dc.source.issue10
dc.source.volume161
dc.identifier.urlhttp://jes.ecsdl.org/content/161/10/D564.abstract
imec.availabilityPublished - open access


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