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System-level ESD protection design using on-wafer characterization and transient simulations

dc.contributor.authorScholz, Mirko
dc.contributor.authorChen, Shih-Hung
dc.contributor.authorThijs, Steven
dc.contributor.authorLinten, Dimitri
dc.contributor.authorHellings, Geert
dc.contributor.authorVandersteen, Gerd
dc.contributor.authorSawada, Masanori
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-22T05:36:30Z
dc.date.available2021-10-22T05:36:30Z
dc.date.issued2014
dc.identifier.issn1530-4388
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24497
dc.sourceIIOimport
dc.titleSystem-level ESD protection design using on-wafer characterization and transient simulations
dc.typeJournal article
dc.contributor.imecauthorChen, Shih-Hung
dc.contributor.imecauthorThijs, Steven
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorHellings, Geert
dc.contributor.imecauthorVandersteen, Gerd
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecThijs, Steven::0000-0003-2889-8345
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecHellings, Geert::0000-0002-5376-2119
dc.source.peerreviewyes
dc.source.beginpage104
dc.source.endpage111
dc.source.journalIEEE Transactions on Device and Materials Reliability
dc.source.issue1
dc.source.volume14
dc.identifier.urlhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6208850&tag=1
imec.availabilityPublished - imec


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