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A 4.1mW 3.5GS/s 6b time interleaved ADC in 40nm CMOS

dc.contributor.authorSpagnolo, Annachiara
dc.contributor.authorVerbruggen, Bob
dc.contributor.authorWambacq, Piet
dc.contributor.authorD'amico, Stefano
dc.date.accessioned2021-10-22T06:04:56Z
dc.date.available2021-10-22T06:04:56Z
dc.date.issued2014
dc.identifier.issn1549-7747
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24555
dc.sourceIIOimport
dc.titleA 4.1mW 3.5GS/s 6b time interleaved ADC in 40nm CMOS
dc.typeJournal article
dc.contributor.imecauthorSpagnolo, Annachiara
dc.contributor.imecauthorWambacq, Piet
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.source.peerreviewyes
dc.source.beginpage466
dc.source.endpage470
dc.source.journalIEEE Transactions on Circuits and Systems II: Express Briefs
dc.source.issue7
dc.source.volume61
dc.identifier.urlhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6823685
imec.availabilityPublished - imec


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