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Optimization of inter-gate-dielectrics in hybrid float gate devices to reduce window instability during memory operations

dc.contributor.authorTang, Baojun
dc.contributor.authorZhang, Weidong
dc.contributor.authorBreuil, Laurent
dc.contributor.authorRobinson, Colin
dc.contributor.authorWang, Yunqi
dc.contributor.authorToledano Luque, Maria
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorZhang, Jianfu
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-22T06:24:22Z
dc.date.available2021-10-22T06:24:22Z
dc.date.issued2014
dc.identifier.issn0026-2714
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24595
dc.sourceIIOimport
dc.titleOptimization of inter-gate-dielectrics in hybrid float gate devices to reduce window instability during memory operations
dc.typeJournal article
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.source.peerreviewyes
dc.source.beginpage2258
dc.source.endpage2261
dc.source.journalMicroelectronics Reliability
dc.source.issue9_10
dc.source.volume54
dc.identifier.urlhttp://www.sciencedirect.com/science/article/pii/S0026271414002832#
imec.availabilityPublished - imec
imec.internalnotesSpecial issue: 25th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis - ESREF; Berlin


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