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Intergate dielectric engineering towards large P/E window planar NAND flash

dc.contributor.authorBreuil, Laurent
dc.contributor.authorLisoni, Judit
dc.contributor.authorBlomme, Pieter
dc.contributor.authorTan, Chi Lim
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-22T18:35:22Z
dc.date.available2021-10-22T18:35:22Z
dc.date.issued2015
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25018
dc.sourceIIOimport
dc.titleIntergate dielectric engineering towards large P/E window planar NAND flash
dc.typeJournal article
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorBlomme, Pieter
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1484
dc.source.endpage1490
dc.source.journalIEEE Transactions on Electron Devices
dc.source.issue5
dc.source.volume62
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7073568
imec.availabilityPublished - open access


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