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Fine-grained hardware switching scheme for power reduction in multiplication

dc.contributor.authorHuang, Yanxiang
dc.contributor.authorLi, Chunshu
dc.contributor.authorLi, Meng
dc.contributor.authorVan der Perre, Liesbet
dc.contributor.authorDehaene, Wim
dc.date.accessioned2021-10-23T11:25:30Z
dc.date.available2021-10-23T11:25:30Z
dc.date.issued2016-08
dc.identifier.issn0013-5194
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/26757
dc.sourceIIOimport
dc.titleFine-grained hardware switching scheme for power reduction in multiplication
dc.typeJournal article
dc.contributor.imecauthorLi, Meng
dc.contributor.imecauthorDehaene, Wim
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1374
dc.source.endpage1375
dc.source.journalElectronics Letters
dc.source.issue16
dc.source.volume52
dc.identifier.urlhttp://www.crossref.org/iPage?doi=10.1049%2Fel.2015.3828
imec.availabilityPublished - open access


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