dc.contributor.author | Markulic, Nereo | |
dc.contributor.author | Raczkowski, Kuba | |
dc.contributor.author | Martens, Ewout | |
dc.contributor.author | Paro Filho, Pedro | |
dc.contributor.author | Hershberg, Benjamin | |
dc.contributor.author | Wambacq, Piet | |
dc.contributor.author | Craninckx, Jan | |
dc.date.accessioned | 2021-10-23T12:33:46Z | |
dc.date.available | 2021-10-23T12:33:46Z | |
dc.date.issued | 2016 | |
dc.identifier.issn | 0018-9200 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/26966 | |
dc.source | IIOimport | |
dc.title | A DTC-based subsampling PLL capable of self- calibrated fractional synthesis and two-point modulation | |
dc.type | Journal article | |
dc.contributor.imecauthor | Markulic, Nereo | |
dc.contributor.imecauthor | Martens, Ewout | |
dc.contributor.imecauthor | Hershberg, Benjamin | |
dc.contributor.imecauthor | Wambacq, Piet | |
dc.contributor.imecauthor | Craninckx, Jan | |
dc.contributor.orcidimec | Markulic, Nereo::0000-0001-6691-4647 | |
dc.contributor.orcidimec | Wambacq, Piet::0000-0003-4388-7257 | |
dc.contributor.orcidimec | Craninckx, Jan::0000-0002-3980-0203 | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 3078 | |
dc.source.endpage | 3092 | |
dc.source.journal | IEEE Journal of Solid-State Circuits | |
dc.source.issue | 12 | |
dc.source.volume | 51 | |
dc.identifier.url | http://ieeexplore.ieee.org/document/7583711/ | |
imec.availability | Published - open access | |