Show simple item record

A smaller, faster and more energy-efficient complementary STT-MRAM cell uses three transistors and a ground grid: more is actually less

dc.contributor.authorAppeltans, Raf
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorKar, Gouri Sankar
dc.contributor.authorFurnemont, Arnaud
dc.contributor.authorVan der Perre, Liesbet
dc.contributor.authorDehaene, Wim
dc.date.accessioned2021-10-24T02:52:46Z
dc.date.available2021-10-24T02:52:46Z
dc.date.issued2017
dc.identifier.issn1063-8210
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27757
dc.sourceIIOimport
dc.titleA smaller, faster and more energy-efficient complementary STT-MRAM cell uses three transistors and a ground grid: more is actually less
dc.typeJournal article
dc.contributor.imecauthorAppeltans, Raf
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.imecauthorFurnemont, Arnaud
dc.contributor.imecauthorDehaene, Wim
dc.contributor.orcidimecFurnemont, Arnaud::0000-0002-6378-1030
dc.source.peerreviewyes
dc.source.beginpage1204
dc.source.endpage1214
dc.source.journalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
dc.source.issue4
dc.source.volume25
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7779145/
imec.availabilityPublished - imec


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following collection(s)

Show simple item record