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Back gate voltage and buried-oxide thickness influences on the series resistance of fully depleted SOI MOSFETs at 77 K

dc.contributor.authorNicolett, A. S.
dc.contributor.authorMartino, Joao Antonio
dc.contributor.authorSimoen, Eddy
dc.contributor.authorClaeys, Cor
dc.date.accessioned2021-10-01T08:33:36Z
dc.date.available2021-10-01T08:33:36Z
dc.date.issued1998
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/2805
dc.sourceIIOimport
dc.titleBack gate voltage and buried-oxide thickness influences on the series resistance of fully depleted SOI MOSFETs at 77 K
dc.typeJournal article
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage3
dc.source.endpage25-28
dc.source.journalJournal de Physique IV
dc.source.volume8
imec.availabilityPublished - open access
imec.internalnotesProceedings of the 3rd European Workshop on Low Temperature Electronics. 24-26 June 1998; San Miniato, Italy


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