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Reliability-aware simulation and validation for analog/mixed-signal circuits in sub-32nm CMOS

dc.contributor.authorSimicic, Marko
dc.date.accessioned2021-10-26T03:50:16Z
dc.date.available2021-10-26T03:50:16Z
dc.date.issued2018-08
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31777
dc.sourceIIOimport
dc.titleReliability-aware simulation and validation for analog/mixed-signal circuits in sub-32nm CMOS
dc.typePHD thesis
dc.contributor.imecauthorSimicic, Marko
dc.contributor.orcidimecSimicic, Marko::0000-0002-3623-1842
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.contributor.thesisadvisorGielen, Georges
dc.contributor.thesisadvisorGroeseneken, Guido
dc.identifier.urlhttps://limo.libis.be/primo-explore/fulldisplay?docid=LIRIAS1991634&context=L&vid=Lirias&search_scope=Lirias&tab=default_tab&lang=en_US&fromSitemap=1
imec.availabilityPublished - open access


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