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Time-efficient modelling and simulation of true workload-dependency for BTI-induced degradation in processor-level platform speciifications

dc.contributor.authorCorbetta, S.
dc.contributor.authorWeckx, Pieter
dc.contributor.authorRodopoulos, D.
dc.contributor.authorStamoulis, D.
dc.contributor.authorCatthoor, Francky
dc.date.accessioned2021-10-27T08:11:19Z
dc.date.available2021-10-27T08:11:19Z
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/32746
dc.sourceIIOimport
dc.titleTime-efficient modelling and simulation of true workload-dependency for BTI-induced degradation in processor-level platform speciifications
dc.typeBook chapter
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewyes
dc.source.beginpage217
dc.source.bookHarnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms
dc.source.endpage235
dc.identifier.urlhttps://doi.org/10.1007/978-3-319-91962-1_10
imec.availabilityPublished - imec


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