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dc.contributor.authorMarkulic, Nereo
dc.contributor.authorCraninckx, Jan
dc.contributor.authorWambacq, Piet
dc.date.accessioned2021-10-29T00:35:27Z
dc.date.available2021-10-29T00:35:27Z
dc.date.issued2020
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35555
dc.sourceIIOimport
dc.titleDTC-based subsampling PLLs for low-noise synthesis and two-point modulation
dc.typeBook chapter
dc.contributor.imecauthorMarkulic, Nereo
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.imecauthorWambacq, Piet
dc.contributor.orcidimecMarkulic, Nereo::0000-0001-6691-4647
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.identifier.doi10.1049/PBCS064E_ch14 Book
dc.source.peerreviewyes
dc.source.bookPhase-Locked Frequency Generation and Clocking
imec.availabilityPublished - imec
imec.internalnotesChapter 14


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