A 0.9pJ/cycle 8ppm/degrees C DFLL-based Wakeup timer Enabled by a Time-Domain Trimming and An Embedded Temperature Sensing

Abstract

An on-chip DFLL (Digitally Frequency Locked Loop) based wakeup timer with a time-domain trimming featuring an embedded temperature sensor is presented. The proposed trimming exploits the deterministic temperature characteristics of two complementary resistors and results in a fine trimming step (+/- 1ppm), allowing a small frequency error after trimming (<+/- 20ppm). The temperature sensing is running in the background with negligible power (2%) and hardware overhead (<1%). The chip is fabricated in 40nm CMOS, consumes 380nW, resulting 0.9pJ/cycle energy efficiency while achieving 8ppm/degrees C from -40 degrees C to 80 degrees C.