High-Temperature Time-Dependent Gate Breakdown of p-GaN HEMTs

Abstract

In this article, we present an in-depth high-temperature analysis of the long-term gate reliability in GaN-based power high-electron-mobility transistors (HEMTs) with p-type gate. Three different isolation process options, aimed at improving the time-dependent gate breakdown (TDGB), are proposed and compared by means of constant voltage stress tests performed at different forward gate biases, temperatures, and geometries. In particular, depending on the gate bias and temperature, the breakdown event may occur along the active gate area or through the isolation region. The results show different voltage dependency for such two different failure locations; therefore, two field-acceleration fitting models are needed for the estimation of lifetime. Furthermore, the gate time-to-failure (TTF) shows a non-monotonous temperature dependency at given gate bias. More specifically, a positive and a negative T-derivatives are observed at relatively low and high temperatures, respectively, which are related to active gate area and isolation region failure, respectively.