A Compact, Low-Power Analog Front-End With Event-Driven Input Biasing for High-Density Neural Recording in 22-nm FDSOI

Abstract

An ultra-small-area, low-power analog frontend (AFE) for high-density neural recording is presented in this brief. It features an 11-bit incremental delta-sigma analog-to-digital converter (Delta Sigma ADC) enhanced with an offset-rejecting event-driven input biasing network. This network avoids saturation of the ADC input caused by leakage of the input-coupling capacitor implemented in an advanced technology node. Combining AC-coupling with direct data conversion, the proposed AFE can tolerate a rail-to-rail electrode offset and achieves a good trade-off between power, noise, bandwidth, input impedance, and area. Fabricated in a 22-nm fully-depleted silicon on insulator (FDSOI) process, the design occupies an active area of <0.001 mm(2), the smallest obtained to this date for a neural AFE, and consumes <3 mu W from a 0.8-V supply. It achieves an input-referred noise of 11.3 mu Vrms in the action potential band (300 Hz - 10 kHz) and 10 mu V-rms in the local field potential band (1 Hz - 300 Hz).