Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators

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dc.contributor.author	Jiang, Hongwu
dc.contributor.author	Li, Wantong
dc.contributor.author	Huang, Shanshi
dc.contributor.author	Cosemans, Stefan
dc.contributor.author	Catthoor, Francky
dc.contributor.author	Yu, Shimeng
dc.date.accessioned	2022-04-19T12:07:17Z
dc.date.available	2022-04-02T02:12:05Z
dc.date.available	2022-04-19T12:07:17Z
dc.date.issued	2022
dc.identifier.issn	2168-2356
dc.identifier.other	WOS:000766265600012
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/39565.2
dc.source	WOS
dc.title	Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators
dc.type	Journal article
dc.contributor.imecauthor	Cosemans, Stefan
dc.contributor.imecauthor	Catthoor, Francky
dc.contributor.orcidimec	Catthoor, Francky::0000-0002-3599-8515
dc.identifier.doi	10.1109/MDAT.2021.3050715
dc.source.numberofpages	8
dc.source.peerreview	yes
dc.source.beginpage	48
dc.source.endpage	55
dc.source.journal	IEEE DESIGN & TEST
dc.source.issue	2
dc.source.volume	39
imec.availability	Under review

Version	Item	Date	Summary
3	20.500.12860/39565.3	2022-04-26T08:45:33Z	validation by library/open access desk
2	20.500.12860/39565.2*	2022-04-19T12:00:26Z	validation by imec author
1	20.500.12860/39565	2022-04-02T02:12:05Z

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