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dc.contributor.authorJiang, Hongwu
dc.contributor.authorLi, Wantong
dc.contributor.authorHuang, Shanshi
dc.contributor.authorCosemans, Stefan
dc.contributor.authorCatthoor, Francky
dc.contributor.authorYu, Shimeng
dc.date.accessioned2022-04-26T08:48:49Z
dc.date.available2022-04-02T02:12:05Z
dc.date.available2022-04-19T12:07:17Z
dc.date.available2022-04-26T08:48:49Z
dc.date.issued2022
dc.identifier.issn2168-2356
dc.identifier.otherWOS:000766265600012
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/39565.3
dc.sourceWOS
dc.titleAnalog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators
dc.typeJournal article
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.embargo2022-04-01
dc.identifier.doi10.1109/MDAT.2021.3050715
dc.source.numberofpages8
dc.source.peerreviewyes
dc.source.beginpage48
dc.source.endpage55
dc.source.journalIEEE DESIGN & TEST
dc.source.issue2
dc.source.volume39
imec.availabilityPublished - open access
dc.description.wosFundingTextThis work was supported in part by NSF-CCF under Grant 1903951 and in part by ASCENT one of the Semiconductor Research Corporation (SRC)/Defense Advanced Research Projects Agency (DARPA) JUMP centers.


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