A Compact 0.0054 mm(2) Multipurpose Analog Frontend for Ultrasound Digitizers in 40nm CMOS

Abstract

This brief presents the analysis, design, and measurements of a compact analog frontend for a catheter-integrated ultrasound imaging digitizer. This frontend requires several functions, including single-ended-to-differential conversion, AC coupling, amplification, anti-aliasing, and the capability to drive the subsequent ADC. To minimize chip area and to maximize power efficiency, a 2-stage frontend was designed, where the active stages are built using self-biased inverter-based amplifiers. The measured prototype in 40nm CMOS offers a gain of up to 15dB and a bandwidth up to 20MHz, while consuming up to 162 mu W from a 1.1V supply. The peak FoM of 158dB(J(-1)) and chip area of 0.0054mm(2) are in line with state-of-the-art filters, while the proposed design includes the aforementioned extra functionalities as well.