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Memory Devices and A/D Interfaces: Design Tradeoffs in Mixed-Signal Accelerators for Machine Learning Applications
dc.contributor.author | Caselli, Michele | |
dc.contributor.author | Debacker, Peter | |
dc.contributor.author | Boni, Andrea | |
dc.date.accessioned | 2022-08-26T08:02:03Z | |
dc.date.available | 2022-07-07T02:27:27Z | |
dc.date.available | 2022-08-26T08:02:03Z | |
dc.date.issued | 2022 | |
dc.identifier.issn | 1549-7747 | |
dc.identifier.other | WOS:000818877500013 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/40070.2 | |
dc.source | WOS | |
dc.title | Memory Devices and A/D Interfaces: Design Tradeoffs in Mixed-Signal Accelerators for Machine Learning Applications | |
dc.type | Journal article | |
dc.contributor.orcidimec | Debacker, Peter::0000-0003-3825-5554 | |
dc.identifier.doi | 10.1109/TCSII.2022.3174622 | |
dc.source.numberofpages | 6 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 3084 | |
dc.source.endpage | 3089 | |
dc.source.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | |
dc.source.issue | 7 | |
dc.source.volume | 69 | |
imec.availability | Under review |
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