RRAM-Based STDP Network for Edge Computing in Wearable/Implantable Devices

Abstract

With the technology advancement of wearable and implantable devices, the demand is increasing for low power computing circuits that allow processing of the acquired data on the edge to shorten the response time and save data bandwidth. Resistive-memory-based computing circuits have attracted broad interests due to their potential to implement low-power computing-in-memory macros and neuromorphic processors. This paper explores the hardware implementation of an artificial spiking neural network with the capability of online STDP learning by using a low-power analog CMOS circuit and a resistive random-access memory (RRAM) device. We examined the low power characteristics of the proposed circuit and its potential use for in situ signal processing, which holds promise for neural recording applications using implantable devices such as neural probes.