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Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes
dc.contributor.author | Pei, Zhenlin | |
dc.contributor.author | Mayahinia, Mahta | |
dc.contributor.author | Liu, Hsiao-Hsuan | |
dc.contributor.author | Tahoori, Mehdi | |
dc.contributor.author | Catthoor, Francky | |
dc.contributor.author | Tokei, Zsolt | |
dc.contributor.author | Pan, Chenyun | |
dc.date.accessioned | 2023-01-05T11:04:22Z | |
dc.date.available | 2022-12-30T03:10:11Z | |
dc.date.available | 2023-01-05T11:04:22Z | |
dc.date.issued | 2022-12-01 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.other | WOS:000899973400001 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/40923.2 | |
dc.source | WOS | |
dc.title | Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes | |
dc.type | Journal article | |
dc.type | Journal article (pre-print) | |
dc.contributor.imecauthor | Liu, Hsiao-Hsuan | |
dc.contributor.imecauthor | Catthoor, Francky | |
dc.contributor.imecauthor | Tokei, Zsolt | |
dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
dc.identifier.doi | 10.1109/TED.2022.3225512 | |
dc.source.numberofpages | 9 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 230 | |
dc.source.endpage | 238 | |
dc.source.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | |
dc.source.issue | 1 | |
dc.source.volume | 70 | |
imec.availability | Under review |