Analyzing the Electromigration Challenges of Computation in Resistive Memories

Abstract

Performing the computation in memory (CiM) based on the resistive non-volatile memories can significantly improve the energy efficiency and performance of data-intensive and deep learning applications. Activating multiple rows of the memories at the same time is required in Multiply and Accumulation (MAC) operation of neural networks. This simultaneous activation, however, increases the current density of the shared interconnect, which exacerbates the Electromigration (EM) risk. This paper analyzes the EM phenomenon in CiM-oriented MAC paradigms based on emerging non-volatile resistive memories including Spin Transfer Torque Magnetic RAM (STT-MRAM), Redox-based RAM (ReRAM), and Phase Change Memory (PCM). We show how EM is exacerbated compared to normal memory architectures. For EM analysis in CiM, we modify the existing EM models, and consider different interconnect and array dimensions. We also propose the EM-aware row activation pattern as effective means to mitigate the EM degradations in the analog MAC paradigms.